• 5 Posts
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Joined 1 year ago
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Cake day: September 13th, 2024

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  • I tried using smartctl but it doesn’t seem to like the fact that it’s in a USB enclosure and says “unknown USB bridge”. Trying smartctl -d sat does give some SMART information and says that the “overall-health self-assessment test result” is passed for both based on “Attribute checks”, but I’m not sure if it’s actually passed or it just can’t see the actual failing information. It also says “SMART status not supported: Incomplete response, ATA output registers are missing” above the passed result which seems to indicate that it’s missing the information it needs for a full assessment.

    I run Pi-Hole and Ollama in containers, but neither have mount points or volumes on the hard drives, only the system SSD.

    One drive is a fairly new Seagate IronWolf Pro, but the other is a refurbished server hard drive so if one is dying it’s probably that one, though the stuff I actually care about is copied on both drives and a third one that’s offline and unplugged.

    The weird thing is that this only started happening when I reinstalled the OS, but like I said I reinstalled with newer version so that might be the cause? Maybe some disk/fs implementation changed and now does things automatically when the drives are idle that 42 didn’t do? But I feel like that would still trigger the indicators.

    My next step is probably to use inotify to look at file accesses, experiment with only mounting one drive at a time to see which one clicks or if they all do, maybe even connect the drives to another computer over SATA to do a full SMART check.

    Thank you!





  • Is Erlang special in its architecture or is it more that it’s functional?

    One day I’ll learn how to do purely functional, maybe even purely declarative. But I have to train my brain to think of computer programs like that.

    Is there a functional and/or declarative language that has memory management features similar to Rust as opposed to a garbage collector?




  • but literally beating the flagship desktop chips in single-core performance

    See, this is what I despise about x86. AFAIK it’s literally RISC on the bare metal but there are hundreds of “instructions” running microcode which is basically just a translation layer. You’re not allowed to write code for the actual RISC implementation because that’s a trade secret or something. So obviously single core performance would be shit because you’re basically running an emulator all the time.

    RISC-V can’t come fast enough. Maybe someone will even make a chip that’s RISC-V but with the same instruction/microcode support as x86. So you can run RISC-V code directly or do the microcode thing and pretend you’re on x86. Though that would probably get the shit sued out of them by Intel because god forbid there’s actual innovation that the original creator can’t cash in on.